MISCELLANEOUS TEXT DOCS


BALLY/ASTROCADE MOTHERBOARD FAILURE ZONES
MCM DESIGN's NEW FAILURE ZONE DESCRIPTIONS

MCM Design has categorized the Bally/Astrocade motherboard into 5 zones as a
troubleshooting reference for the 2 diagnostic tools Balcheck and SetScreen. An
upgraded version of the standard commercial Balcheck tests and SetScreen3 are
part of MCM Design's 8KB BalcheckHR package. The 5 zones are described below.

Zone A The motherboard power supplies including the power supply lines to all
       chips. The black Bally AC power transformer is included.

Zone B The circuitry and chips related to the operation of the Z80 address A0-A15
       and data D0-D7 bus lines, allowing the Z80 CPU to fetch and execute Z80
       instructions in ROM. This includes the PINS only of chips,ie, the chips
       considered outside of Zone B such as the Microcycler chips U8, U9 and
       U10 that, if bad, would prevent the operation of the Z80 CPU.

       Also included in Zone B is the Z80 System Clock input at the Z80 pin 6
       plus the ROM decoders.

Zone C All circuitry and chips related to the operation of the Microcycler bus
       lines MXD0-MXD7. This includes the MC0 and MC1 output lines from the
       custom data chip.

       Also included is the 7M and System Clock generation circuitry.

Zone D The interfacing related to the operation of the custom address lines
       MA0-MA5 and the custom data lines MD0-MD7.

       The timing circuitry generating the RAS, CAS, and WE control lines (all
       active low) for screen RAM.

       The 8 screen RAM chips.

       The TV video display circuitry including the RF modulator.

Zone E The I/O circuitry including the custom I/O chip.

       The 2 system clocks at the I/O chip pins 16 and 20 are considered coming
       from Zone C.


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CUSTOM DATA CHIP POWER-ON INITIALIZATION

This is MCM Design's tests documentation for the custom data chip regarding its
initialization immediately when powered on.

The tests below where run on MCM Design's low/hi-res Astrocade which utilizes a
single 8KB ROM chip, the 1978 version. The Astrocade also includes an 8KB user
RAM allocated 6000-7FFFH, switchable to 2000H. Variations of the original
SetScreen routine where entered at 6000H into a compatible EEPROM using Bit
Fiddler's Machine Language Monitor (MLM) so they could be switched to 2000H for
the tests.

The following tests were performed to determine how the custom data chip
initializes IMMEDIATELY when powered on.

1. A. With the power already on and the menu displayed, are color registers
      set to zero with a manual reset? No. At reset, a ROM power up routine is
      executed setting up the TV screen parameters prior to executing the ROM
      menu routine.

   B. Enter at 6000H for the test at 2000H:

      2000H C3 03 20    JP A2003
      2003H 76          HALT

      Display menu, flip routine to 2000H and press reset button.
      What happens?

      Z80 CPU halts and just keeps executing Nops.
      Z80 pin 18 goes to logic 0.
      Menu continues to be displayed with no changes.

      Also checked HALT (active low) line at pin 18 with an oscilloscope.
      Was a waveform there or just a logic 0? Logic 0 was there.

2. Sometimes when the motherboard powers on, the TV screen just displays
   scrambled pixels with the menu colors.

   Why? Unknown at this time. The ROM power up routine sets up the screen
   parameters including the menu colors, but for some reason the power up routine
   does not seem to continue and execute the on-board MENU subroutine #74. Very
   peculiar. Where does the Z80 wonder off to? Does it crash and lock up the
   system? See also the Note in 3.E below.

   Check the HALT (active low) line again at the Z80 pin 18 with a voltmeter.
   It was at logic high. So, no halt state occurs during the scrambled pixel
   display.

   Note: During a power on, when the motherboard resets automatically, you will
         see, very briefly, the screen of scrambled pixels with menu colors,
         just before the normal menu display.

3. Turn the power on and note what happens with variations of the original
   SetScreen at 2000H as indicated below.

   For the tests below, reference the original SetScreen routine at 2000H in the
   doc "Troubleshooting the Bally/Astrocade Motherboard Power Up With SetScreen,
   A New Tool" which is archived on the BallyAlley.com website in the FAQS
   section.

   A. If 200BH routine just has a halt instruction, op code 76.
      
      2000H C3 0B 20    JP A200B

      200BH 76          HALT

      The TV screen powered on Black (Blank).

   B. If 200BH routine just has "set colors" instructions followed by a HALT
      instruction.

      The entire screen, top to bottom, nearly left to right is light blue in
      color.

      The custom data chip initializes, at power on, the TV screen color split
      line to zero, which is the very left side of the screen RAM area.

      The vertical blank line is also initialized to zero, which hides all the
      pixels in the screen RAM area.

      The horizontal color boundary initializes to 00 (bits 7 and 6).

      So, to the right of the TV screen color split line is the
      background color = color register 0 = light blue as defined by the color
      table at 2003H.

      To the left of the TV screen color split line is the
      background color = color register 4 = black also defined by the color
      table at 2003H. You can confirm this by changing the color black at
      2006H to another color. The area to the left of the TV screen color split
      line (set to zero) appears as a narrow black vertical stripe on the very
      left side of the TV screen.


   C. If 200BH has "set horizontal color boundary" and "set colors" instuctions
      followed by a HALT instruction. The vertical blank register (line) is not
      initialized by software.

      Saw the entire screen split with black on the left and blue on the right.

      Note: The vertical blank register must have been initialized to zero
            because all the pixels in the screen RAM area were hidden from view.

   D. With the entire SetScreen routine at 200BH.

      When the power was on and the menu was displayed, flipping the SetScreen
      routine from 6000H t0 2000H and pressing the reset button changed the
      menu colors with the colors split left and right as defined in the color
      table at 2003H. The stack and saved data area at the bottom of the screen
      were also visible.

   E. With the entire SetScreen routine at 2000H and the power turned on, the
      TV screen background was split with black on the left and blue on the
      right. The screen RAM area was now revealed showing the typical scrambled
      pixels with the split colors as defined by the color table at 2003H.


   Note: After you saw SetScreen's display in 3.E, you flipped the
         routine back to 6000H and pushed quickly the reset button, not
         holding it down. The menu colors were set, but you were still seeing
         the same (probably) scrambled pixel display. When you pushed the reset
         button a second time, you got the normal menu.

         This peculiarity can also happen when the motherboard is powered on as
         indicated in above 2. But, this same peculiarity in 3.E occured with
         the power already on.


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ELIMINATING THE IRRITATING "BEEPING" IN THE COMMERCIAL STANDARD BALCHECK TESTS


The change below removes the irritating audio beeping present in the commercial
standard Balcheck tests. The ROM code listing, for the commercial Balcheck, is
archived on the BallyAlley.com website in the Balcheck instructions manual.

OLD
2398H 3E FF    LD A,FFH

NEW (revised)
2398H 7A       LD A,D
2399H 00       NOP




End of document
MCM Design
Dec 2018